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Compatibility permits the computer and the peripheral units to communicate intelligently. The compatibility involves logic levels, timing or speed, and control. When digital data is transmitted between two units, the binary voltage or current levels must be compatible. Logic-level conversion is often required to properly interface different types of logic circuits.

For example, logic-level shifting is often required to properly interface bipolar and MOS circuits. The speed of the data transmission must also be compatible. Some type of temporary storage between the two units may be required as a buffer to match the high-speed CPU to a low-speed peripheral unit. Control is another function of the interface. There are status lines that tell when the computer or peripheral unit is ready or busy, and strobe lines that actually initiate the data transfers. This process is often referred to as “handshaking.” The type of information exchanged between the I/O unit and the peripheral devices includes data, addressing,. Modulj kartogramma dlya autocad civil 3d 2015. Since multiple I/O units can usually be connected to a computer, some coding scheme is required to select the desired unit.

This is usually done with a binary word used as an address. The address is transmitted to all the peripheral devices. The unit recognizing the address is connected to the I/O section. Data can then be transmitted to or from the device over the interconnecting data lines. The actual data transfers are controlled by between the two devices.

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Programmed data transfers that take place as the result of executing an I/O instruction usually cause the data to be transferred between the peripheral unit and the accumulator register in the CPU. Other CPU registers may also be used, depending upon the computer architecture and the instruction. In some computers, peripheral units are addressed as storage locations, and all memory reference instructions can be used in performing I/O operations. No special I/O instructions are used in these computers. PARALLEL VERSUS SERIAL DATA TRANSMISSIONS There are two methods of transmitting digital data. These methods are parallel and serial transmissions.

In parallel data transmission, all bits of the binary data are transmitted simultaneously. For example, to transmit an 8-bit binary number in parallel from one unit to another, eight transmission lines are required. Each bit requires its own separate data path. All bits of a word are transmitted at the same time.

This method of transmission can move a significant amount of data in a given period of time. Its disadvantage is the large number of interconnecting cables between the two units. For large binary words, cabling becomes complex and expensive. This is particularly true if the distance between the two units is great.

Long multiwire cables are not only expensive, but also require special interfacing to minimize noise and distortion problems. Serial data transmission is the process of transmitting binary words a bit at a time. Since the bits time-share the transmission medium, only one interconnecting lead is required. Vosstanie pod rukovodstvom isataya taj manova sirima datova. While serial data transmission is much simpler and less expensive because of the use of a single interconnecting line, it is a very slow method of data transmission.

Serial data transmission is useful in systems where high speed is not a requirement. Serial data transmission techniques are widely used in transmitting data between a computer and its peripheral units. While the computer operates at very high speeds, most peripheral units are slow because of their electromechanical nature. Slower serial data transmission is more compatible with such devices.

Since the speed of serial transmission is more than adequate in such units, the advantages of low cost and simplicity of the signal interconnecting obtained. PARALLEL DATA TRANSMISSION line can be In a parallel data transmission system, each bit of the binary word to be transmitted must have its own data path. There are a variety of ways to implement this data path.